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Items where Author is "Ul Asad, H."

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Number of items: 7.


Ul Asad, H. & Jones, K. (2016). Verifying Inevitability of Oscillation in Ring Oscillators Using the Deductive SOS-QE Approach. IEEE Design and Test, 33(5), pp. 35-43. doi: 10.1109/MDAT.2016.2573588

Book Section

Ul Asad, H. & Jones, K. (2015). Verifying inevitability of phase-locking in a charge pump phase lock loop using sum of squares programming. In: Proceedings of the 25th edition on Great Lakes Symposium on VLSI. (pp. 295-300). New York, USA: ACM. doi: 10.1145/2742060.2742072

Ul Asad, H., Jones, K. & Surre, F. (2014). Verifying Robust Frequency Domain Properties of Non Linear Oscillators using SMT. In: Pleskacz, W., Renovell, M., Kasprowicz, D. , Sekanina, L. & Bernard, S. (Eds.), 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. (pp. 306-309). IEEE. doi: 10.1109/DDECS.2014.6868816

Conference or Workshop Item

Gashi, I. ORCID: 0000-0002-8017-3184 & Ul Asad, H. (2018). Diversity in Open Source Intrusion Detection Systems. In: Computer Safety, Reliability, and Security. SAFECOMP 2018. . Cham, Switzerland: Springer. ISBN 978-3-319-99129-0

Ul Asad, H. & Jones, K. (2015). Inevitability of Phase-locking in a Charge Pump Phase Lock Loop using Deductive Verification. Paper presented at the 25th edition on Great Lakes Symposium on VLSI, 20-05-2015 - 22-05-2015, Pittsburgh, USA.

Ul Asad, H., Jones, K. & Surre, F. (2014). Verifying robust frequency domain properties of non linear oscillators using SMT. Paper presented at the 17th Symposium on Design & Diagnostics of Electronic Circuits & Systems, 23rd - 25th April 2014, Warsaw, Poland.


Ul Asad, H. (2016). Formal verification of analog and mixed signal circuits using deductive and bounded approaches. (Unpublished Doctoral thesis, City University London)

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