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Abstract

An architecture-independent test program generator for producing test programs for checking the operation of a hardware processor design comprises means for storing data representing the processor instruction set and resources, and logic for generating, for subsequent storage or processing, test programs from said stored data, characterized in that the data is a separate declarative specification, the generator comprising logic for extracting said data from the storage means, and in that the relationships between the processor resources and semantic entities associated with each instruction are modelled in said declarative specification.

Publication Type:	Patent
Additional Information:	Source: United States Patent and Trademark Office, https://www.uspto.gov/
Subjects:	Q Science > QA Mathematics > QA75 Electronic computers. Computer science
Departments:	Bayes Business School > Management

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