Write Pattern Format Algorithm for Reliable NAND-Based SSDs

Xu, Q., Chen, T., Hu, Y. & Gong, P. (2014). Write Pattern Format Algorithm for Reliable NAND-Based SSDs. IEEE Transactions on Circuits and Systems II: Express Briefs, 61(7), pp. 516-520. doi: 10.1109/TCSII.2014.2327332

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Abstract

This brief presents and evaluates a pre-coding algorithm to reduce power consumption and improve data retention in NAND-based solid-state drives. Compared to the state-of-the-art asymmetric coding and stripe pattern elimination algorithm, the proposed write pattern format algorithm (WPFA) achieves better data retention while consuming less power. The hardware for WPFA is simpler and requires less circuitry. The performance of WPFA is evaluated by both computer simulations and field-programmable gate array implementation.

Item Type: Article
Additional Information: © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Uncontrolled Keywords: Solid-state drive, reliability, NAND flash memory, power consumption
Subjects: Q Science > QA Mathematics > QA75 Electronic computers. Computer science
Divisions: School of Engineering & Mathematical Sciences > Engineering
URI: http://openaccess.city.ac.uk/id/eprint/8194

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